Landing: 2af7be77bc66
Project / Subsystem
gcc / x86-64
Date
2026-08-24
Author
H.J. Lu
Commit
2af7be77bc66859f6d998f4f31fdee66a809ccf8
Source
github
Perf win
Yes
Breaking
No
All attributes
- project
- gcc
- subsystem
- x86-64
- patch_id
- —
- commit_hash
- 2af7be77bc66859f6d998f4f31fdee66a809ccf8
- source_type
- github
- headline
- x86-64: Increase gain for TImode pand/pior/pxor loads
- tldr
- x86-64 target cost model now correctly accounts for TImode bitwise loads, improving instruction selection.
- author
- H.J. Lu
- outcome
- committed
- performance_win
- true
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • x86-64
- • optimization
- • cost model
- • sse
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-24T00:00:00.000Z
The cost model for x86-64 has been updated to assign a gain of one instruction cost to pand, pior, and pxor operations on TImode operands. This accurately reflects that these operations on 128-bit integers require a single memory load, unlike previous costings that might have implied two loads for DImode operations. This change should lead to more optimal instruction selection for bitwise operations on 128-bit data types.