Landing: e096b2205f81
Project / Subsystem
gcc / risc-v
Date
2026-08-25
Author
Robin Dapp
Commit
e096b2205f81b3db9d06f4ee4da9badbb0c6de20
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- e096b2205f81b3db9d06f4ee4da9badbb0c6de20
- source_type
- github
- headline
- RISC-V: Add TImode and OImode move expanders.
- tldr
- RISC-V now supports TImode and OImode move operations, addressing issues with vector register sub-parts.
- author
- Robin Dapp
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • compiler
- • vectorization
- • backend
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-25T00:00:00.000Z
RISC-V support has been enhanced with the addition of TImode and OImode move expanders. This resolves an issue where sub-parts of vector registers, such as (subreg:TI (reg:V4SF R) 0), were valid but could not be split or moved. The changes define necessary move operations to enable these capabilities on the RISC-V architecture.