Landing: dff9c226cf9a
Project / Subsystem
gcc / risc-v
Date
2026-08-26
Author
Jin Ma
Commit
dff9c226cf9a17eb774efbc29ab9c3a395a3ec9e
Source
github
Perf win
Yes
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- dff9c226cf9a17eb774efbc29ab9c3a395a3ec9e
- source_type
- github
- headline
- RISC-V bit manipulation: Use BEXT for masked bit-test branches.
- tldr
- RISC-V bit manipulation: Replaces instruction sequence for masked bit-test branches with BEXT, reducing instruction count.
- author
- Jin Ma
- outcome
- committed
- performance_win
- true
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • RISC-V
- • optimization
- • instruction selection
- • performance
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-26T00:00:00.000Z
This commit optimizes RISC-V bit-test branches by utilizing the BEXT (Bit Extraction) instruction. Previously, masked bit tests with XLEN-wide indices involved a BSET and AND instruction pair before the branch. By matching the masked form of BEXT when the mask is XLEN-1, the compiler can now emit a single BEXT instruction followed by the branch, reducing the dynamic instruction count by approximately 0.5% on SPEC CPU 2017 Integer benchmark 541.leela_r.