Landing: c3b9dc79868a
Project / Subsystem
gcc / risc-v
Date
2026-08-27
Author
Pan Li
Commit
c3b9dc79868a7b3a92753a61cfb7625a1d2aa291
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- c3b9dc79868a7b3a92753a61cfb7625a1d2aa291
- source_type
- github
- headline
- RISC-V vector instruction tests added for register overlap.
- tldr
- New test cases verify register group overlap for RISC-V vwmacc.vx vector instruction.
- author
- Pan Li
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • vector
- • testing
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-27T00:00:00.000Z
A comprehensive suite of new test cases has been added to the RISC-V testsuite to specifically address register group overlap scenarios for the vwmacc.vx vector instruction. These tests cover various data types (i8, i16, i32) and different vector lengths (m1, m2, m4, mf2, mf4, mf8), ensuring that the compiler correctly handles potential register conflicts or dependencies when generating code for these instructions.