Landing: 4a0bb62b2d41
Project / Subsystem
gcc / risc-v
Date
2026-08-28
Author
Pan Li
Commit
4a0bb62b2d41cc3db78b350894c4b6465c3a1c3f
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- 4a0bb62b2d41cc3db78b350894c4b6465c3a1c3f
- source_type
- github
- headline
- RISC-V: Add test cases for vwmaccsu.vx register overlap
- tldr
- New test cases verify correct handling of register group overlap for RISC-V vwmaccsu.vx instruction.
- author
- Pan Li
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • vector extension
- • testing
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-08-28T00:00:00.000Z
This commit introduces a comprehensive suite of test cases for the RISC-V vwmaccsu.vx instruction, specifically focusing on scenarios involving register group overlap. These tests aim to ensure the correct and robust implementation of this vector instruction, even when registers are reused or when potential conflicts might arise.