Landing: d45a9c006add

← All landings

Project / Subsystem

gcc / risc-v

Date

2026-08-28

Author

Pan Li

Commit

d45a9c006addfc1c224f12c24e87fb8522e7cea1

Source

github

Perf win

Breaking

View on GitHub →

All attributes

project: gcc
subsystem: risc-v
patch_id: —
commit_hash: d45a9c006addfc1c224f12c24e87fb8522e7cea1
source_type: github
headline: Add more test cases for vwmaccsu.vx
tldr: Added new test cases for the RISC-V `vwmaccsu.vx` instruction.
author: Pan Li
outcome: committed
performance_win: false
breaking_change: false
series_id: —
series_parts: []
tags: • risc-v
• vector
• testsuite
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/d45a9c006addfc1c224f12c24e87fb8522e7cea1
date: 2026-08-28T00:00:00.000Z

This commit enhances the test suite for the RISC-V architecture by adding new test cases specifically for the vwmaccsu.vx instruction. These tests are intended to cover scenarios related to CSR register checks when overlap is enabled, ensuring the correct behavior of this vector multiplication-accumulation instruction.