Landing: 0b67b93cfe0a

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Project / Subsystem

gcc / risc-v

Date

2026-08-31

Author

Robin Dapp

Commit

0b67b93cfe0a67fe431a22b163ac0319fd6ec5da

Source

github

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project: gcc
subsystem: risc-v
patch_id: —
commit_hash: 0b67b93cfe0a67fe431a22b163ac0319fd6ec5da
source_type: github
headline: RISC-V: Set REGMODE_NATURAL_SIZE for VLS vectors
tldr: Ensures correct handling of sub-register access for RISC-V VLS vectors.
author: Robin Dapp
outcome: committed
performance_win: false
breaking_change: false
series_id: —
series_parts: []
tags: • risc-v
• vector
• compiler internals
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/0b67b93cfe0a67fe431a22b163ac0319fd6ec5da
date: 2026-08-31T00:00:00.000Z

This commit adjusts the REGMODE_NATURAL_SIZE definition for RISC-V VLS (Vector Length Selectable) vector modes. It now correctly reports the size of a full vector, preventing invalid sub-register accesses and ensuring that operations on vector elements are properly managed.