Landing: 48c933a69a89
Project / Subsystem
binutils / risc-v
Date
2026-09-01
Author
Kuan-Lin Chen <kuanlinchen@sourceware.org>
Commit
48c933a69a890e7769ca8a01570aab578b6a9f54
Source
public_inbox
Perf win
No
Breaking
No
All attributes
- project
- binutils
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- 48c933a69a890e7769ca8a01570aab578b6a9f54
- source_type
- public_inbox
- headline
- RISC-V: Add support for XAndesVSIntH extension
- tldr
- Binutils now supports the RISC-V XAndesVSIntH extension for vector integer operations.
- author
- Kuan-Lin Chen <kuanlinchen@sourceware.org>
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • vector instructions
- • assembler
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-09-01T00:00:00.000Z
This commit adds support for the XAndesVSIntH extension to the RISC-V toolchain. The changes include updates to BFD for ELF compatibility, GAS for assembler directives and tests, and the opcode library for instruction recognition. This enables the use of new vector integer instructions for enhanced performance on compatible hardware.