Landing: ce6455998599

Project / Subsystem

binutils / risc-v

Date

2026-09-01

Author

Kuan-Lin Chen <kuanlinchen@sourceware.org>

Commit

ce6455998599d6a8af6f4aea8813392921e4e86c

Source

public_inbox

Perf win

No

Breaking

No

All attributes

project
binutils
subsystem
risc-v
patch_id
—
commit_hash
ce6455998599d6a8af6f4aea8813392921e4e86c
source_type
public_inbox
headline
RISC-V: Add support for XAndesBFHCvt extension
tldr
Binutils now supports the RISC-V XAndesBFHCvt extension for scalar BF16 and FP32 conversion instructions.
author
Kuan-Lin Chen <kuanlinchen@sourceware.org>
outcome
committed
performance_win
false
breaking_change
false
series_id
—
series_parts
[]
tags
  • • risc-v
  • • floating-point
  • • assembler
discussion_id_link
—
bugzilla_pr
—
date
2026-09-01T00:00:00.000Z

This commit adds support for the RISC-V XAndesBFHCvt extension, enabling scalar conversion instructions between BF16 and FP32 formats. Changes include updates to BFD for ELF handling, GAS for assembler syntax and tests, and the opcode library for instruction definitions. This improves the efficiency of mixed-precision floating-point operations.