Landing: f58993d5fbdf
Project / Subsystem
binutils / risc-v
Date
2026-09-01
Author
Kuan-Lin Chen <kuanlinchen@sourceware.org>
Commit
f58993d5fbdfb7c5033adf483a1abed66f315ceb
Source
public_inbox
Perf win
No
Breaking
No
All attributes
- project
- binutils
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- f58993d5fbdfb7c5033adf483a1abed66f315ceb
- source_type
- public_inbox
- headline
- RISC-V: Add support for XAndesVPackFPH extension
- tldr
- Binutils now supports the RISC-V XAndesVPackFPH extension for packed floating-point instructions.
- author
- Kuan-Lin Chen <kuanlinchen@sourceware.org>
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • floating-point
- • vector instructions
- • assembler
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-09-01T00:00:00.000Z
This commit adds support for the RISC-V XAndesVPackFPH extension, enabling packed FP16 fused multiply-add instructions. Updates were made to BFD for ELF handling, GAS for assembler directives and tests, and the opcode library for instruction recognition. This allows for more efficient floating-point operations on compatible Andes architectures.