Landing: 3486b0c1a808

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Project / Subsystem

gcc / gcc/i386

Date

2026-09-02

Author

Haochen Jiang

Commit

3486b0c1a808239125640593ad115d01d433e212

Source

github

Perf win

Yes

Breaking

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All attributes

project: gcc
subsystem: gcc/i386
patch_id: —
commit_hash: 3486b0c1a808239125640593ad115d01d433e212
source_type: github
headline: Support ACEv1 bsr instructions
tldr: Adds support for ACEv1 Block Scale Register (BSR) instructions, using specific naming conventions for future extensibility.
author: Haochen Jiang
outcome: committed
performance_win: true
breaking_change: false
series_id: —
series_parts: []
tags: • gcc
• i386
• ACEv1
• BSR
• instruction set
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/3486b0c1a808239125640593ad115d01d433e212
date: 2026-09-02T00:00:00.000Z

This commit introduces support for ACEv1 BSR instructions, implementing specific naming conventions like bsr0 and using insert/extract in intrinsic names to align with existing load/store conventions. It also uses the term ‘full’ for bsrmovf to clarify it refers to the entire data, not floating-point. Changes span intrinsic headers, builtin definitions, and machine-specific instruction patterns, with new test cases added.