Landing: 7cbb7185d07f

Project / Subsystem

gcc / aarch64

Date

2026-09-03

Author

Kyrylo Tkachov

Commit

7cbb7185d07fca6f087a7426e5ad4c402a08c366

Source

github

Perf win

Yes

Breaking

No

All attributes

project
gcc
subsystem
aarch64
patch_id
—
commit_hash
7cbb7185d07fca6f087a7426e5ad4c402a08c366
source_type
github
headline
aarch64: Use SVE2 SQSHRNB and UQSHRNB for narrowing shifts.
tldr
AArch64 SVE2 now uses specialized instructions for saturating narrowing shifts, improving efficiency.
author
Kyrylo Tkachov
outcome
committed
performance_win
true
breaking_change
false
series_id
—
series_parts
[]
tags
  • • aarch64
  • • sve2
  • • vectorization
  • • optimization
discussion_id_link
—
bugzilla_pr
—
date
2026-09-03T00:00:00.000Z

GCC’s AArch64 backend now leverages SVE2’s SQSHRNB and UQSHRNB instructions for saturating narrowing right shifts. This allows the compiler to fuse a constant right shift with a saturating truncation into a single instruction, where previously these were separate operations. The changes extend vector mode matching to cover relevant SVE modes and update machine description files to recognize these fused operations, improving performance for code involving saturating shifts and truncations on SVE2-capable hardware. This resolves PR126629.