Landing: f95a1c7f4e4b

Project / Subsystem

gcc / riscv

Date

2026-09-19

Author

Milan Tripkovic

Commit

f95a1c7f4e4b1f4c41e40d2eab8cbde258292962

Source

github

Perf win

Yes

Breaking

No

All attributes

project
gcc
subsystem
riscv
patch_id
—
commit_hash
f95a1c7f4e4b1f4c41e40d2eab8cbde258292962
source_type
github
headline
RISC-V: Add constant synthesis using shNadd.uw instruction
tldr
Enables RISC-V compiler to synthesize constants more efficiently using the shNadd.uw instruction.
author
Milan Tripkovic
outcome
committed
performance_win
true
breaking_change
false
series_id
—
series_parts
[]
tags
  • • risc-v
  • • optimization
  • • compiler
discussion_id_link
—
bugzilla_pr
—
date
2026-09-19T00:00:00.000Z

This patch introduces support for synthesizing certain 64-bit constants on RISC-V using the shNadd.uw instruction, which performs a shift and add operation. Previously, creating such constants involved multiple instructions. The compiler now identifies opportunities to use shNadd.uw for specific constant values that fit the pattern u * (2^N + 1) - 2^32, leading to more compact code. A new test case verifies this optimization, and the logic for handling fused multiply-add (FMA) with use_uw is adjusted for correctness.