Landing: 060d50fe29d0

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Project / Subsystem

gcc / aarch64

Date

2026-09-21

Author

Matt Turner

Commit

060d50fe29d01c429320114a71a549c512219782

Source

github

Perf win

Breaking

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All attributes

project: gcc
subsystem: aarch64
patch_id: —
commit_hash: 060d50fe29d01c429320114a71a549c512219782
source_type: github
headline: aarch64: umov and smov require base Advanced SIMD
tldr: AArch64 extension instructions `umov` and `smov` are now correctly guarded by `base_simd` attribute.
author: Matt Turner
outcome: committed
performance_win: false
breaking_change: false
series_id: gcc:aarch64: umov and smov require base advanced simd
series_parts: []
tags: • aarch64
• assembler
• instruction selection
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/060d50fe29d01c429320114a71a549c512219782
date: 2026-09-21T00:00:00.000Z

The AArch64 assembler instructions umov and smov, used for extending 16-bit values, were previously guarded by the fp (floating-point) architecture attribute. This commit corrects this by guarding them with the base_simd attribute instead. This ensures that code compiled without SIMD support (e.g., with -march=armv8-a+nosimd) will correctly fall back to memory-based extension, preventing assembler errors.