Landing: c4a80f2d336b

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Project / Subsystem

gcc / risc-v

Date

2026-09-21

Author

Eric Botcazou

Commit

c4a80f2d336b8fb78cc97f9107981119b1eff30b

Source

github

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project: gcc
subsystem: risc-v
patch_id: —
commit_hash: c4a80f2d336b8fb78cc97f9107981119b1eff30b
source_type: github
headline: RISC-V: Fix ICE on arrays with negative low bounds in 32-bit mode
tldr: Compiler no longer crashes when processing RISC-V arrays with negative lower bounds in 32-bit mode.
author: Eric Botcazou
outcome: committed
performance_win: false
breaking_change: false
series_id: —
series_parts: []
tags: • risc-v
• compiler
• bugfix
• ada
discussion_id_link: —
bugzilla_pr: —
url: https://github.com/gcc-mirror/gcc/commit/c4a80f2d336b8fb78cc97f9107981119b1eff30b
date: 2026-09-21T00:00:00.000Z

An internal compiler error (ICE) occurred in the RISC-V backend when handling arrays with negative lower bounds in 32-bit mode. The issue stemmed from calculating the number of array elements using HOST_WIDE_INT, which did not correctly emulate the wraparound behavior of 32-bit sizetype indices. This commit modifies riscv_flatten_aggregate_field to use the precision of the index type for this calculation, resolving the ICE and ensuring correct behavior.