Landing: 441953ac9d0b

Project / Subsystem

binutils / gas/risc-v

Date

2026-09-23

Author

Kito Cheng <kito@sourceware.org>

Commit

441953ac9d0b2902be92906817c68feadccd190f

Source

public_inbox

Perf win

No

Breaking

No

All attributes

project
binutils
subsystem
gas/risc-v
patch_id
—
commit_hash
441953ac9d0b2902be92906817c68feadccd190f
source_type
public_inbox
headline
RISC-V tail pseudo instruction accepts optional register
tldr
RISC-V tail pseudo-instruction now accepts an optional register argument for scratch usage.
author
Kito Cheng <kito@sourceware.org>
outcome
committed
performance_win
false
breaking_change
false
series_id
—
series_parts
[]
tags
  • • RISC-V
  • • assembler
  • • instruction set extensions
discussion_id_link
—
bugzilla_pr
—
date
2026-09-23T00:00:00.000Z

The RISC-V tail pseudo-instruction now supports an optional register argument, similar to the jump instruction. This allows compilers to emit software-guarded tail calls using a scratch register, ensuring compatibility with systems that may not have the Zicfilp extension enabled, by using an auipc hint encoding.