Landing: 3d5f011ffec3
Project / Subsystem
gcc / risc-v
Date
2026-09-28
Author
Pan Li
Commit
3d5f011ffec35d928577f5cfd24c101c5950ae93
Source
github
Perf win
No
Breaking
No
All attributes
- project
- gcc
- subsystem
- risc-v
- patch_id
- —
- commit_hash
- 3d5f011ffec35d928577f5cfd24c101c5950ae93
- source_type
- github
- headline
- RISC-V: Add test cases for vfwadd.vf reg overlap
- tldr
- Adds new RISC-V vector test cases for register group overlap with vfwadd.vf instructions.
- author
- Pan Li
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • risc-v
- • vector
- • testing
- • rvv
- • optimization
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-09-28T00:00:00.000Z
This commit adds a collection of new test cases for the RISC-V Vector (RVV) extension, focusing on register group overlap for the vfwadd.vf instruction. The tests cover various data types (f16, f32) and vector lengths (m1, m2, m4, mf2, mf4), ensuring correct handling of register resources during wide floating-point fused multiply-add operations.