Landing: b0c84e4cd5da

Project / Subsystem

binutils / binutils/ld

Date

2026-10-01

Author

Kito Cheng <kito@sourceware.org>

Commit

b0c84e4cd5dae13d186b6099c080137d250a986a

Source

public_inbox

Perf win

Yes

Breaking

No

All attributes

project
binutils
subsystem
binutils/ld
patch_id
—
commit_hash
b0c84e4cd5dae13d186b6099c080137d250a986a
source_type
public_inbox
headline
RISC-V: Add DT_RELR support for position-independent code
tldr
RISC-V now supports DT_RELR for efficient handling of position-independent code relocations.
author
Kito Cheng <kito@sourceware.org>
outcome
committed
performance_win
true
breaking_change
false
series_id
—
series_parts
[]
tags
  • • risc-v
  • • elf
  • • linker
  • • PIC
discussion_id_link
—
bugzilla_pr
—
date
2026-10-01T00:00:00.000Z

This commit introduces support for DT_RELR in the RISC-V ELF toolchain, enhancing the handling of position-independent code (PIC). It includes modifications to the assembler, linker, and readelf utility to correctly process and display these relocations, mirroring implementations from AArch64 and LoongArch.