Landing: e522ebecf738

Project / Subsystem

binutils / bfd

Date

2026-10-02

Author

Jens Remus <jremus@sourceware.org>

Commit

e522ebecf7381e1e03548a7d0816b8ce3c038984

Source

public_inbox

Perf win

No

Breaking

No

All attributes

project
binutils
subsystem
bfd
patch_id
—
commit_hash
e522ebecf7381e1e03548a7d0816b8ce3c038984
source_type
public_inbox
headline
RISC-V: Fix GOT entry confusion for DT_RELR.
tldr
Corrects handling of GOT entries for DT_RELR relocations on RISC-V.
author
Jens Remus <jremus@sourceware.org>
outcome
committed
performance_win
false
breaking_change
false
series_id
—
series_parts
[]
tags
  • • risc-v
  • • linker
  • • elf
  • • relocation
discussion_id_link
—
bugzilla_pr
—
date
2026-10-02T00:00:00.000Z

This commit fixes a “union phase confusion” in how GOT entries are handled for DT_RELR relocations on RISC-V targets. It adjusts the condition that checks for no allocated GOT entry, aligning it with changes in how the offset semantics are repurposed after allocate_dynrelocs.