Landing: 43664b695956
Project / Subsystem
binutils / binutils/x86
Date
2026-10-05
Author
Jan Beulich <jbeulich@sourceware.org>
Commit
43664b695956d3ddef927c98b951b6955d63f6bd
Source
public_inbox
Perf win
No
Breaking
No
All attributes
- project
- binutils
- subsystem
- binutils/x86
- patch_id
- —
- commit_hash
- 43664b695956d3ddef927c98b951b6955d63f6bd
- source_type
- public_inbox
- headline
- Support for internal 'TILE' feature
- tldr
- Binutils introduces an internal 'TILE' pseudo-ISA for shared AMX tile instructions.
- author
- Jan Beulich <jbeulich@sourceware.org>
- outcome
- committed
- performance_win
- false
- breaking_change
- false
- series_id
- —
- series_parts
- []
- tags
-
- • x86
- • assembler
- • amd
- • ace
- • amx
- discussion_id_link
- —
- bugzilla_pr
- —
- date
- 2026-10-05T00:00:00.000Z
This commit adds an internal pseudo-Instruction Set Architecture (ISA) bit named ‘TILE’ to represent a shared subset of AMX tile instructions. This distinction is necessary because AMD’s ACE architecture shares some tile registers and instructions (LDTILECFG, STTILECFG, TILERELEASE, TILEZERO) with AMX_TILE, while others are exclusive to AMX.