aarch64: Remove disassembly restriction on OP_MOV_Z_Zi
Removes a disassembly restriction on the OP_MOV_Z_Zi opcode and updates alias priority for AArch64.
This patch removes an artificial restriction on disassembling the OP_MOV_Z_Zi opcode in the aarch64 disassembler. The restriction was intended to force a different alias to be used for disassembly when the index value was zero. The patch now uses alias priority to achieve the same result, and removes the unused OP_MOV_Z_Zi enum value.
In Details
This patch modifies the aarch64 disassembler (opcodes/aarch64-dis-2.c and include/opcode/aarch64.h) to remove a restriction on the OP_MOV_Z_Zi opcode. The opcode is related to SVE (Scalable Vector Extension) and alias selection during disassembly.
For Context
This patch modifies the binutils disassembler for the AArch64 architecture. It removes a restriction and updates alias priority during the disassembly of OP_MOV_Z_Zi opcode. Instructions in a given architecture can often be expressed in multiple ways; this change impacts how the disassembler prefers one form over another.