aarch64: Remove +mpamv2 feature option
Removes the obsolete +mpamv2 feature option from the aarch64 architecture.
This patch series proposes removing the +mpamv2 feature option for the aarch64 architecture in binutils. The change is motivated by the fact that MPAMv2 related details now only use system registers and are no longer controlled by a specific feature option, with MPAMv2 becoming optional from Armv9.3-a. The author clarifies a potential typo and explains the rationale behind the change.
- proposer
Removes the +mpamv2 architecture option and adjusts tests because MPAMv2 details now only use system registers and are optional from Armv9.3-a.
“The remaining mpamv2 details only use system registers; so by our conventions we do not use a feature option to enable them. Remove the now +mpamv2 architecture option and adjust the tests accordingly.”
- reviewer
Asks if 'now' was a typo in the proposer's statement.
“Is "now" a typo?”
- proposer
Clarifies that 'now' was not a typo but that 'redundant' should have followed it, and provides context on the timing of the specification change.
“No, but the word 'redundant' should have been after it :)”
Technical Tradeoffs
- Removes a now-obsolete feature flag, simplifying the build configuration.
- Ensures consistency with current ARM architecture specifications.
In Details
This patch removes the +mpamv2 feature flag from the aarch64 configuration in binutils. This is because the MPAMv2 controls are now exclusively managed via system registers, and the feature itself is no longer a mandatory part of the architecture from Armv9.3-a onwards. The change simplifies the feature set and aligns binutils with the evolving ARM architecture specifications.
- MPAMv2
- Memory Partitioning and Monitoring version 2, a feature in ARM architectures for managing and monitoring memory access at a hardware level.
- System Register
- Special-purpose registers in ARM processors used for configuration, control, and status information, often related to system-level features.
- AArch64
- The 64-bit execution state of the ARMv8 architecture and its successors.