binutils Newspaper
JULY 29, 2026
risc-v Ready to Land

RISC-V: add dedicated vector arithmetic .insn forms

A reviewer LGTMs a patch adding vector arithmetic instruction forms for RISC-V but suggests clarifying magic numbers with masks.

A reviewer has provided a positive ‘Looks Good To Me’ (LGTM) on a patch series introducing dedicated .insn forms for RISC-V vector arithmetic instructions. While the patch is considered good enough to merge, the reviewer suggests a minor improvement: defining separate masks and matches for the funct3 field instead of using raw hexadecimal values (0x7000), which would enhance code readability and understanding.

In the Thread 2 participants
  1. Nelson Chu <nelson.chu1990@gmail.com> reviewer

    LGTMs the patch but suggests defining extra MASK/MATCH for funct3 to improve clarity over using raw values.

    “LGTM +1. A minor thing (this patch is already good enough to me without any change) is do you think we need to define extra MASK/MATCH for funct3 to represent bits 10-12 rather than use 0x7000 directly? So that might make it immediately clear to understand what these values represent.”
  2. Jiawei <jiawei@iscas.ac.cn> proposer

    Proposed adding dedicated `.insn` forms for RISC-V vector arithmetic instructions to simplify their encoding, with v3 clarifying operand order.

Technical Tradeoffs

  • Using raw values for opcode fields is concise but less readable; using named constants (MASK/MATCH) improves readability at the cost of slightly more verbose definitions.

In Details

This patch for binutils' RISC-V support adds new .insn directives, which are assembler constructs for encoding machine instructions. Specifically, it targets vector arithmetic instructions, providing specialized forms to make encoding easier than general-purpose ones. The discussion revolves around whether to use symbolic constants (MASK/MATCH) for opcode fields or literal values.

For Context
RISC-V
An open-standard instruction set architecture (ISA) based on reduced instruction set computer principles.
.insn
An assembler directive used in some toolchains (like GNU AS) to explicitly encode machine instructions, often used for variable-length or custom instruction sets.
funct3
A 3-bit field in RISC-V instructions used to discriminate between different operations within a given opcode class.
LGTM
Acronym for 'Looks Good To Me', a common affirmative response in code reviews indicating approval.
opcode
The part of a machine language instruction that specifies the operation to be performed.
Filed Under: binutilsrisc-vassemblervector-instructionsencoding