x86: emit warnings to avoid potential encoding surprises
Adds warnings for x86 instructions that might silently fall back to unintended encodings (e.g., AVX512VL) when specific features are disabled.
This patch introduces warnings in the x86 assembler to alert users when certain instructions might silently fall back to less-specific or unintended encodings. This occurs when newer ISA extensions (like AVX512VL for FMA and F16C, or VNNI and CRC32 variants) are implicitly selected due to feature flags, potentially leading to unexpected behavior if the user’s code is not aware of these extensions. The changes ensure that users are notified of these potential encoding surprises, particularly when using .arch .no* directives or when newer ISA extensions are not explicitly enabled.
- proposer
Proposes adding warnings to the x86 assembler to prevent silent fallbacks to unintended instruction encodings.
“FMA and F16C insns have direct AVX512VL counterparts. If the respective of the two features is disabled, we'd silently fall back to the corresponding EVEX encoding, which may not be intended by the user (their code may, for example, not be AVX512-aware at all). See also [1], [2].”
In Details
The x86 assembler (gas) is being updated to issue warnings when instructions with direct AVX512VL encodings (like FMA, F16C, VNNI, CRC32) are encountered but the necessary AVX512VL feature is not explicitly enabled. Currently, gas might silently fall back to a more general EVEX encoding, which could lead to program misbehavior if the code is not AVX512VL-aware. This patch modifies install_template in tc-i386.c to detect and warn about these fallback scenarios.
- FMA
- Fused Multiply-Add, an instruction set extension that combines multiplication and addition operations.
- F16C
- Half-precision floating-point conversion instructions.
- AVX512VL
- AVX-512 Vector Length Extensions, which allow AVX-512 instructions to operate on 128-bit and 256-bit vectors in addition to 512-bit vectors.
- EVEX
- An encoding scheme used for AVX-512 instructions, providing extended capabilities and more flexible operand access.
- VNNI
- Vector Neural Network Instructions, a set of instructions designed to accelerate deep learning workloads.
- CRC32
- Cyclic Redundancy Check, an error-detecting code; the patch refers to specific instructions for computing CRC32.
- encoding surprises
- Situations where an instruction is compiled or assembled into a different machine code encoding than the user might expect, potentially due to feature flag interactions.