APX instruction encoding and performance penalty
Intel clarifies that APX EVEX-encoded instructions with operand size prefixes may incur performance penalties.
This discussion clarifies a performance aspect of Intel’s APX (Advanced Performance Extensions) instruction set. A reviewer inquired whether EVEX-encoded instructions, similar to legacy encodings, would suffer performance penalties if operand size prefixes change the immediate size. The response confirms that overriding the default operand size, which changes the overall instruction length, can indeed lead to a penalty.
- proposer
Confirms that overriding operand size in APX EVEX-encoded instructions can incur a performance penalty if it changes the instruction length.
“Yes, it will suffer penalty. If you use a "default" OSIZE/ASIZE for a given mode+opcode, then there's no penalty. If you override something which changes overall length, there's a potential penalty.”
- reviewer
Asked whether APX EVEX-encoded instructions with operand size prefixes changing immediate size would suffer performance penalties, similar to legacy encodings.
“What I'm asking is whether e.g. {nf} add 0x777, %cx is penalized over either of {nf} add 0x777, %ecx {nf} add 0x777, %rcx (the former having imm16, the latter two having imm32). And I assume that like for legacy encodings {nf} add 0x77, %cl is not. (Yet independently the non-ND 8- and 16-bit forms then would likely suffer a partial register access penalty.)”
Technical Tradeoffs
- Potential performance penalties for using operand size prefixes with EVEX encoding.
- Code size may increase if prefixes are used to achieve smaller immediates.
- Requires careful consideration by developers optimizing for APX.
In Details
This exchange concerns the performance implications of operand size overrides within APX's EVEX encoding. Specifically, it addresses whether changing the immediate size via prefixes (e.g., 0x777 to 0x7777) in an EVEX-encoded instruction, which may alter the instruction's byte length, incurs a decode penalty on Intel CPUs. The response clarifies that such length changes can indeed trigger penalties.
- APX
- Advanced Performance Extensions, a set of new instructions and features for x86 processors aimed at improving performance and efficiency.
- EVEX
- A prefix byte used in x86-64 instruction encoding to support extended features like AVX-512, allowing for 256-bit and 512-bit vector operations and more flexible encoding.
- operand size prefix
- An instruction prefix byte (like 0x66) that modifies the default operand size (e.g., from 32-bit to 16-bit) for subsequent instructions.