binutils Newspaper
OCTOBER 6, 2026
risc-v — Proposed

RISC-V: Support Zvabd version 0.9

Updates RISC-V binutils support for the Zvabd extension to version 0.9, reflecting changes in instruction variants and encodings.

This patch updates the binutils support for the RISC-V Zvabd (integer vector absolute difference) extension to its latest approved version, 0.9. The RISC-V Architecture Review Committee (ARC) revised the instruction variants and encodings, necessitating this update. The changes affect BFD, gas, and opcodes components, including modifications to ELF definitions, NEWS file, test cases, and opcode definitions.

In Details

This patch updates binutils to support version 0.9 of the RISC-V Zvabd (integer vector absolute difference) extension. The Zvabd extension itself is part of the RISC-V vector extension family, designed to accelerate vector operations, specifically absolute differences between vector elements. The update reflects changes in instruction encodings and variants as defined in the RISC-V ISA manual and the Zvabd specification. This ensures that binutils can correctly assemble and process code using the latest Zvabd instructions.

For Context
Zvabd
A RISC-V extension for integer vector absolute difference operations. It provides instructions to compute the absolute difference between elements of two vectors or between a vector and a scalar.
RISC-V
An open-standard instruction set architecture based on Reduced Instruction Set Computer principles.
version 0.9
The specific version of the Zvabd extension that this patch adds support for, indicating a finalized or near-finalized specification.
instruction variants
Different forms or encodings of an instruction that may perform slightly different operations or operate on different data types.
encodings
The binary representation of machine instructions.
BFD
Binary File Descriptor library, a part of binutils that provides a common interface to various object file formats.
gas
GNU Assembler, part of binutils, responsible for converting assembly language code into machine code.
opcodes
The part of a machine language instruction that specifies the operation to be performed.
Filed Under: RISC-Vbinutilsassemblerextension support