binutils Newspaper
OCTOBER 6, 2026
risc-v — Proposed

RISC-V: Add Sspmp extension support

Patch adds minimal support for RISC-V Sspmp, Sspmpen, and Smpmpdeleg extensions and their CSRs to binutils.

This patch introduces basic support for the RISC-V Sspmp, Sspmpen, and Smpmpdeleg extensions, along with their associated Control and Status Registers (CSRs). The changes are applied to BFD, GAS, and include new test cases to verify the functionality. The update reflects the specifications found in the RISC-V SPMP extension document.

In Details

This patch adds minimal assembler support in binutils for the RISC-V Sspmp (Scalar Secure Physical Memory Protection), Sspmpen (Secure Physical Memory Protection Enable), and Smpmpdeleg (Secure Physical Memory Protection Delegation) extensions. It involves updating BFD to recognize these extensions as implicit subsets and modifying GAS to handle the new CSR addresses and definitions, along with adding corresponding test suite entries.

For Context
Sspmp
RISC-V Scalar Secure Physical Memory Protection extension. It provides mechanisms for fine-grained memory protection, particularly for scalar operations.
Sspmpen
RISC-V Scalar Secure Physical Memory Protection Enable extension. This likely relates to enabling or configuring the Sspmp features.
Smpmpdeleg
RISC-V Secure Physical Memory Protection Delegation extension. This extension likely deals with delegating memory protection management responsibilities.
CSR
Control and Status Register. Special-purpose registers in RISC-V architecture used for controlling processor operations and monitoring system status.
RISC-V
An open-standard instruction set architecture (ISA) based on reduced instruction set computer principles.
BFD
Binary File Descriptor library, a component of binutils that provides a portable interface to object file formats like ELF.
GAS
The GNU Assembler, part of the GNU Binutils package, responsible for converting assembly language code into machine code.
Filed Under: risc-vassemblerextensionmemory protectioncsr