Questions on PLT changes after Intel CET patch
A developer is seeking clarification on how the Intel CET patch has affected the implementation of the Procedure Linkage Table (PLT) in binutils.
Hyungwon Kim is investigating changes to the Procedure Linkage Table (PLT) in binutils that resulted from the Intel Control-flow Enforcement Technology (CET) patch. After studying resources on PLT and GOT, Kim is compiling code examples and seeking to understand the specific modifications made to the PLT implementation due to CET.
In Details
This inquiry concerns the interaction between Intel CET (Control-flow Enforcement Technology) and the Procedure Linkage Table (PLT) implementation within binutils. Specifically, the author is trying to understand how the introduction of CET, which provides hardware-based protections against control-flow hijacking attacks, has altered the way PLT entries are generated or handled by the linker, particularly in relation to the Global Offset Table (GOT).
- PLT
- Procedure Linkage Table. A table used in dynamically linked executables to achieve indirection for function calls, allowing code to call functions in shared libraries without needing to know their absolute addresses at link time.
- GOT
- Global Offset Table. A table used in position-independent code (PIC) to store addresses of global variables and functions, enabling dynamic linking.
- Intel CET
- Control-flow Enforcement Technology. A set of hardware features designed to protect against control-flow hijacking attacks, such as Return-Oriented Programming (ROP) and Jump-Oriented Programming (JOP).
- Dynamic linking
- A process in which executable files are linked with shared libraries at runtime, rather than at compile time. This allows multiple programs to use the same library code efficiently.