s390: Rename insn format RRR_FE0FEFE to RRF_FE0FEFE
Renames the S/390 instruction format RRR_FE0FEFE to RRF_FE0FEFE to reflect architectural changes.
This patch renames the S/390 instruction format RRR_FE0FEFE to RRF_FE0FEFE. The change is motivated by architectural updates where the RRR format has been effectively merged into the RRF-a format since the IBM z196 processor. This renaming ensures that the opcode definitions accurately represent the current instruction set architecture.
In Details
This patch renames an instruction format definition within the S/390 opcode table. The INSTR_RRR_FE0FEFE and MASK_RRR_FE0FEFE macros in s390-opc.c are being renamed to INSTR_RRF_FE0FEFE and MASK_RRF_FE0FEFE, respectively. This reflects a change in the S/390 architecture, where the RRR format has been subsumed by RRF-a on newer processors like the z196. The corresponding entries in s390-opc.txt are also updated to use the new format name for specific instructions.
- s390
- IBM's 31-bit and 64-bit mainframe architecture.
- opcode
- A machine language instruction.
- instruction format
- A specific layout of bits within a machine instruction that defines the operation code and operand fields.
- RRR
- A type of S/390 instruction format where all operands are registers.
- RRF
- A type of S/390 instruction format that includes register and fixed-point fields.