s390: Add .insn pseudo-mnemonics ri_a/b/c
Adds support for RI-a, RI-b, and RI-c pseudo-mnemonics for s390 architecture.
This patch adds support for the RI-a, RI-b, and RI-c instruction formats on the s390 architecture using the .insn pseudo-mnemonic. These formats predate the IBM z900, so they share the same minimum architecture/CPU level as the base RI format. The changes include updating opcode definitions, adding comments to ESA/390 tests, and new test cases for z/Architecture.
- proposer
Adds support for RI-a, RI-b, and RI-c pseudo-mnemonics, sharing the base RI minimum architecture level and including tests.
“Instruction format RI, including its variants RI-a/b/c, predate IBM z900. Therefore use the .insn ri minimum architecture/CPU level for all variants.”
In Details
This patch extends the s390 assembler's support for the .insn directive by adding pseudo-mnemonics for RI-a, RI-b, and RI-c instruction formats. These are variants of the Relative ISTRUCTION (RI) format, which has existed since before the IBM z900. Consequently, these variants do not impose stricter architecture level requirements than the base RI format. The changes include updates to s390-opc.c and gas/testsuite/gas/s390/.
- RI
- A s390 instruction format, typically involving register and immediate operands.
- RI-a/b/c
- Variants of the RI instruction format.
- .insn
- An assembler directive used to specify machine instructions directly, often with pseudo-mnemonics.