s390: Add .insn pseudo-mnemonics ril_a/b/c
Adds support for RIL-a, RIL-b, and RIL-c pseudo-mnemonics for s390 architecture.
This patch introduces support for the RIL-a, RIL-b, and RIL-c instruction formats on the s390 architecture using the .insn pseudo-mnemonic. It requires specific minimum architecture levels for each variant and adds tests for the rilu pseudo-mnemonic. The changes update opcode definitions and gas test suites.
- proposer
Adds support for RIL-a, RIL-b, and RIL-c pseudo-mnemonics, requiring specific minimum architecture levels and including tests for rilu.
“History of instruction format RIL: - RIL-b/c got initially introduced as RIL with IBM z900. [1, 2] - RIL-a got introduced with IBM z9-109. [3, 4] Require the respective minimum architecture/CPU level. While at it add test for non-standard RIL .insn pseudo-mnemonic rilu.”
In Details
This patch extends the s390 assembler's support for the .insn directive by adding pseudo-mnemonics for the RIL-a, RIL-b, and RIL-c instruction formats. These formats, variations of the Relative ISTRUCTION List (RIL) format, were introduced in different IBM mainframe generations (z900, z9-109). The changes involve updating the s390-opc.c to recognize these new mnemonics and adding corresponding test cases in gas/testsuite/gas/s390/ to verify their encoding and disassembly.