s390: Make R1 and R2 operands optional in .insn pseudo-mnemonic rre
Makes the R1 and R2 operands optional for the s390 .insn pseudo-mnemonic 'rre', aligning it with the instruction format.
This patch modifies the s390 assembler to make the R1 and R2 operands optional in the .insn pseudo-mnemonic for the RRE instruction. This change aligns the assembler’s syntax with the RRE instruction format, which specifies R1 and R2 as optional fields. The patch also updates documentation and adds corresponding test cases for both ESA/390 and z/Architecture variants.
In Details
This patch updates opcodes/s390-opc.c and related test files to make the R1 and R2 operands optional for the .insn pseudo-mnemonic rre on s390. The RRE instruction format itself has optional R1 and R2 fields. This change ensures the assembler correctly handles cases where these operands are omitted, improving syntax flexibility and adherence to the specification. Documentation in gas/doc/c-s390.texi and new test cases for ESA/390 and z/Arch are included.
- .insn
- An assembler pseudo-mnemonic that allows embedding raw machine instructions using their format and opcode.
- pseudo-mnemonic
- An assembler directive that represents a machine instruction or a sequence of instructions using a symbolic name.
- s390
- IBM's mainframe and enterprise server architecture.
- optional operands
- Operands for an instruction or pseudo-mnemonic that are not required and can be omitted, often controlled by the instruction format or specific flags.
- RRE format
- A specific instruction encoding format for the s390 architecture, likely related to register-to-register operations.