binutils Newspaper
JUNE 15, 2026
risc-v Ready to Land

RISC-V: rename operand descriptor O4

Renames the RISC-V operand descriptor `O4` to `O7` for consistency, as it describes a 7-bit field.

This patch renames the RISC-V operand descriptor O4 to O7 to better reflect that it represents a 7-bit opcode field. The renaming improves consistency with other operand descriptors (O<n> and F<n>). This change simplifies subsequent code modifications. Reviewers have indicated that the patch looks good.

In Details

This patch modifies the RISC-V opcode definitions in gas/config/tc-riscv.c and opcodes/riscv-opc.c. Operand descriptors define the format of operands in RISC-V assembly instructions. The change ensures consistency in naming operand descriptors that represent bit fields.

For Context

In computer architecture, opcodes (operation codes) are instructions that tell the CPU what to do. Assemblers use operand descriptors to define the format, size and location of instruction arguments. This patch renames an operand descriptor in the RISC-V architecture's assembly definition to better reflect the size of the opcode field it describes, improving code clarity and maintainability.

Part of a Series

Filed Under: risc-vassembleropcodeoperand descriptorconsistency