RISC-V: Responses to feedback on ARC-V APEX assembler/disassembler support
Luis Silva responds to feedback and agrees to present the ARC-V APEX assembler/disassembler support at the toolchain SIG meeting.
Luis Silva replies to Kito Cheng’s feedback on the proposed ARC-V APEX assembler and disassembler support for RISC-V. Kito suggested discussing the approach in a toolchain SIG meeting to ensure consensus between LLVM and GNU communities and standardizing it before moving forward. Luis agrees to present the work at the toolchain SIG meeting and potentially create a PR to the riscv-c-api-doc repository to start the discussion.
- proposer
Agrees to present the ARC-V APEX assembler/disassembler support at the toolchain SIG meeting and potentially create a PR to the riscv-c-api-doc repository to start the discussion.
“Thank you for the positive feedback! I'd be happy to present this at the toolchain SIG meeting and have further discussion.”
In Details
This thread discusses the proposed addition of ARC-V APEX support to the RISC-V assembler and disassembler. APEX allows dynamic definition of custom instructions. Standardizing this functionality across toolchains (GNU and LLVM) is crucial for interoperability and wider adoption. The discussion aims to achieve consensus on the implementation before it proceeds further.
For Context
Assemblers and disassemblers are tools that translate between human-readable assembly code and machine code. This discussion centers around adding support for a feature called ARC-V APEX to the RISC-V toolchain. APEX allows developers to define their own custom instructions, but it's important to ensure compatibility across different toolchains. The goal is to discuss and standardize this feature before it's fully implemented.