RISC-V: replace INSN_V_EEW64
Introduce INSN_CLASS_ZVE64X for RISC-V vector instructions.
This patch replaces the INSN_V_EEW64 flag with the more specific INSN_CLASS_ZVE64X in the RISC-V assembler and BFD library. This change improves clarity by properly categorizing instructions that support the ZVE64X extension, making diagnostics and subset checks more accurate, especially concerning the interaction between ZVE32X and ZVE64X.
In Details
This patch refactors the RISC-V vector extension handling by replacing the generic INSN_V_EEW64 flag with a dedicated instruction class INSN_CLASS_ZVE64X. This allows for more precise logic in BFD and the assembler, particularly when determining compatibility between the base 'v' extension, ZVE32X, and ZVE64X. It ensures that instructions intended only for 64-bit effective element width extensions (like ZVE64X) are correctly handled and diagnosed, especially when ZVE32X is enabled.
- RISC-V
- An open-source instruction set architecture (ISA) that is gaining popularity for its modularity and extensibility.
- INSN_V_EEW64
- A flag indicating that a vector instruction supports a 64-bit effective element width.
- INSN_CLASS_ZVE64X
- A new instruction class representing RISC-V vector instructions that are part of the ZVE64X extension.
- ZVE32X
- A RISC-V vector extension that provides 32-bit element width support.
- ZVE64X
- A RISC-V vector extension that provides 64-bit element width support.
- BFD
- Binary File Descriptor library, a GNU component that abstracts different object file formats.