WEDNESDAY, SEPTEMBER 2, 2026
binutils — Under Review
RISC-V: Add support for XXTVarith and XXTVcoder extensions
Follow-up on a previous patch to add RISC-V XXTVarith and XXTVcoder extensions.
Bohan Lei is pinging the mailing list for a review of a previously submitted patch that adds support for the XXTVarith and XXTVcoder extensions to the RISC-V architecture in binutils. A link to the original patch on patchwork is provided.
In the Thread
- proposer
Follows up on a previous patch to request a review for RISC-V XXTVarith and XXTVcoder extensions.
“Ping. Could anyone help review the vendor-extension patch?”
In Details
This is a follow-up message regarding a patch for the binutils project, specifically targeting the RISC-V architecture. The patch proposes adding support for two new extensions: XXTVarith and XXTVcoder. The author is seeking a review of this vendor-extension patch.
For Context
- RISC-V
- An open-standard instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles.
- XXTVarith
- A proposed or existing extension for the RISC-V architecture, likely related to variable-length operations or arithmetic.
- XXTVcoder
- A proposed or existing extension for the RISC-V architecture, possibly related to variable-length encoding or vector operations.
- vendor extension
- Custom instructions or features added by a specific hardware vendor to a standard architecture, such as RISC-V.