RISC-V: Fix fmv.x testcase for non-default --with-arch
RISC-V testcase for fmv.x instruction fixed to explicitly use -march=rv32i.
A RISC-V testcase for the fmv.x instruction has been fixed by explicitly setting the -march=rv32i flag. Previously, the testcase did not specify -march, causing it to inherit the configured default architecture. This led to failures when using --with-arch configurations that lacked the necessary extensions, such as rv32e or rv32i_zfinx. The fix ensures the testcase correctly checks the aliasing of fmv.x.s/fmv.s.x to fmv.x.w/fmv.w.x regardless of the base ISA.
- proposer
Confirms the patch has been pushed to the trunk.
“Thanks, pushed to trunk :)”
- contributor
Acknowledges a reminder to Cc maintainers for patches.
“Okay, thanks for the reminder.”
- reviewer
Advises Cc'ing relevant maintainers for better patch visibility.
“Btw, when you send patches, you may want to Cc all respective maintainers, to have an overall better chance of getting an approval indication back.”
- proposer
Explains that the testcase fails with non-default -march configurations.
“The testcase doesn't pass -march, so it inherits the configured default architecture, and fails with e.g. --with-arch=rv32e* (no a6) or --with-arch=rv32i_zfinx (".option arch, +f" conflicts). It only checks that fmv.x.s/fmv.s.x are aliases of fmv.x.w/fmv.w.x, which doesn't depend on the base ISA.”
Technical Tradeoffs
- Hardcodes a specific architecture flag in a testcase, reducing its flexibility but increasing its reliability.
- Ensures consistent test results across different build configurations.
In Details
The gas/testsuite/gas/riscv/fmv.x.d testcase was failing when compiled with specific --with-arch configurations because it relied on the default architecture. This patch hardcodes -march=rv32i to ensure the test only checks the instruction aliasing (fmv.x.s to fmv.x.w) and not architecture-specific behavior.
- fmv.x
- A RISC-V instruction for moving a value between integer and floating-point registers. The testcase checks aliases for this instruction.
- -march
- A compiler flag used to specify the target RISC-V architecture and extensions. The testcase previously did not specify this, leading to variations in behavior.
- RISC-V
- An open-source instruction set architecture (ISA) that is modular and extensible, widely used in embedded systems and high-performance computing.
- Testcase
- A specific scenario or input designed to verify the correct behavior of a piece of software, in this case, the assembler.