xtensa: implement R_XTENSA_32_ABS
Adds a new 32-bit absolute address relocation type (R_XTENSA_32_ABS) for Xtensa, compatible with LLVM and allowing coexistence with existing R_XTENSA_32 reloca…
This patch implements R_XTENSA_32_ABS, a new 32-bit absolute address relocation type for the Xtensa architecture. This relocation is computed as S + A and follows the generic ABI for SHT_RELA, meaning the addend is solely in r_addend. This is the format LLVM emits for 32-bit absolute data. The change ensures that R_XTENSA_32_ABS is handled identically to R_XTENSA_32 during relocation application and relaxation, allowing objects using either to be linked together. It also enables the coalescing of literals using these relocations. New command-line options (--abs32-rela, --no-abs32-rela) and a configure-time option (--enable-r-xtensa-32-abs) are introduced to control which relocation type the assembler emits by default.
In Details
This patch introduces BFD_RELOC_XTENSA_32_ABS to the Xtensa BFD backend. This new relocation type, intended for 32-bit absolute addresses, is defined as S + A and uses the r_addend field exclusively, aligning with SHT_RELA semantics, unlike the existing R_XTENSA_32 which might incorporate the relocated word into the addend. The implementation ensures R_XTENSA_32_ABS is treated compatibly with R_XTENSA_32 during linking and relaxation, facilitating interoperation with code generated by LLVM. New options are added to control the assembler's emission of this relocation type.
- R_XTENSA_32_ABS
- A new 32-bit relocation type for Xtensa, representing an absolute address calculated as symbol address plus addend (S + A).
- SHT_RELA
- A section type in the ELF file format that contains relocation entries with explicit addends. The addend is a separate field within the relocation entry.
- Relaxation
- A process where the linker or assembler adjusts instructions or addresses after initial assembly, often to optimize code size or adapt to specific hardware features.
- Addend
- A value within a relocation entry that is added to the symbol's address or the relocation's base address to determine the final resolved address.