x86: ACE V1 support for AMX-shared instructions
Enables ACE V1 architecture to reuse existing AMX instructions for tile management, row moves, and row converts.
This patch enables the ACE V1 architecture and allows it to reuse existing AMX-shared instructions for tile management, row moves, and row converts. It also permits the usage of TMM registers under the ACE_V1 architecture, aligning with the ACE specification.
In Details
This change integrates the ACE V1 architecture into binutils by reusing existing AMX-related functionality. It updates gas/config/tc-i386.c to include ACE_V1 as a supported CPU architecture, and modifies opcodes/i386-opc.tbl and test suites to ensure that AMX-shared instructions are correctly associated with ACE V1. This allows ACE V1 to leverage the groundwork laid for AMX, simplifying its implementation.
- ACE V1
- AI Compute Extensions version 1, a set of x86 instructions designed to accelerate AI and machine learning workloads.
- AMX
- Advanced Matrix Extensions, an x86 instruction set extension for accelerating matrix operations.
- TMM registers
- Tile Matrix Multiply registers, used by AMX for matrix operations.
- gas
- The GNU Assembler, part of the GNU Binutils project.
- opcodes
- The part of an instruction that specifies the operation to be performed. In binutils, 'opcodes' refers to the component responsible for instruction decoding and encoding.