x86: support for internal 'TILE' feature
Adds an internal 'TILE' pseudo-ISA bit to represent instructions shared by AMX_TILE and ACE_V1.
This patch introduces an internal pseudo-ISA bit named ‘TILE’ within binutils. This feature represents a shared subset of instructions and registers between AMX_TILE and the upcoming ACE V1 architecture, specifically for tile management operations like LDTILECFG, STTILECFG, TILERELEASE, and TILEZERO.
In Details
This patch defines an internal feature flag, cputile, in gas/config/tc-i386.c and associated test cases. This flag groups instructions and register usage common to both AMX_TILE and ACE_V1. It is implemented as a pseudo-ISA bit, meaning it's not a hardware feature itself but a way for binutils to manage shared functionality. The implementation ensures that cputile is enabled when either AMX_TILE or ACE_V1 is enabled, and correctly handles its interaction with other CPU features.
- pseudo-ISA bit
- An internal flag or bit used by the assembler or compiler to represent a set of features or instructions that do not correspond to a single, distinct hardware ISA extension. It helps in managing shared functionality.
- AMX_TILE
- A subset of the Advanced Matrix Extensions (AMX) instruction set, focused on tile-related operations.
- ACE V1
- AI Compute Extensions version 1, a new x86 instruction set extension.
- gas
- The GNU Assembler, part of the GNU Binutils project.
- ISA
- Instruction Set Architecture. The set of commands a processor can execute.