x86: add ACE V1 tile outer product instructions
Adds assembler and disassembler support for ACE V1 tile outer product instructions.
This patch enhances binutils by adding assembler and disassembler support for several x86 ACE V1 tile outer product instructions: TOP2BF16PS, TOP4B*, and TOP4MX*. The changes include updates to the NEWS file, test suites, and various opcode and disassembler-related header files. This brings comprehensive support for these advanced matrix operations to the toolchain.
In Details
This is the final patch in a series adding ACE v1 support. It specifically targets the tile outer product instructions (TOP2BF16PS, TOP4B*, TOP4MX*). The patch modifies opcode tables and disassembler logic to correctly parse and format these instructions, referencing the ACE v1 Specification. It includes new test cases and updates to the gas/NEWS file.
- ACE V1
- Refers to the first version of the AI Compute Extensions (ACE) specification, a set of x86 instructions designed for AI and high-performance computing tasks.
- tile outer product
- A matrix operation that computes the outer product of two vectors, where the vectors are represented as tiles. These instructions are crucial for accelerating matrix multiplication and other deep learning workloads.
- TOP2BF16PS
- A specific x86 instruction for computing a tile outer product using 16-bit Brain Floating Point (BF16) precision.
- TOP4B*
- A family of x86 instructions for tile outer products, likely operating on 4-byte data types.
- TOP4MX*
- Another family of x86 instructions for tile outer products, possibly involving mixed-precision operands.