x86: add ACE V1 ISA support
Adds assembler and disassembler support for the x86 ACE V1 (AI Compute Extensions) instructions.
This patch series introduces assembler and disassembler support for the new x86 ACE V1 (AI Compute Extensions) instructions. The series first adds prerequisite patches for internal features like ‘TILE’ and EVEX decoding, then enables ACE V1 and adds support for its specific instructions, including block scale registers and tile operations.
In Details
This is the cover letter for a series of patches adding support for the ACE V1 instruction set to binutils. It outlines the changes, which include establishing a shared 'TILE' feature, fixing EVEX decoding for new instructions, and integrating the ACE V1 ISA itself, including new registers and instructions for tile management and block scaling. The series is structured with prerequisites first, followed by the core ACE V1 enablement.
- ACE V1
- AI Compute Extensions version 1, a new set of x86 instructions designed to accelerate AI and machine learning workloads.
- assembler
- A program that converts assembly language source code into machine code.
- disassembler
- A program that converts machine code into assembly language source code.
- EVEX
- A 4-byte instruction prefix used in AVX-512 and later x86 instruction sets to encode features like vector length, rounding, and masking.
- ISA
- Instruction Set Architecture. The set of commands a processor can execute.