x86: add ACE v1 support for tile move instructions
Adds assembler and disassembler support for ACE v1 tile move instructions (TILEMOVROW, TILEMOVCOL).
This patch enables assembler and disassembler support for the x86 ACE v1 instructions TILEMOVROW and TILEMOVCOL. It addresses an issue where the register selector is always 32-bit, but using VexGdq with W=1 incorrectly prints a 64-bit register. The fix ensures correct representation by using VexGd instead. The changes are detailed in the AI Compute Extensions (ACE) Specification v1.16.2.
In Details
This patch adds support for ACE v1 tile move instructions (TILEMOVROW, TILEMOVCOL) to binutils. It specifically handles the EVEX encoding, noting that the register selector is 32-bit but VexGdq with W=1 defaults to a 64-bit register display. The solution uses VexGd to ensure correct assembly and disassembly. Test cases for x86-64 ACE v1 are included.
- ACE v1
- Refers to the first version of the AI Compute Extensions (ACE) specification, a set of x86 instructions designed for AI and high-performance computing tasks.
- TILEMOVROW
- An x86 instruction that moves data between tiles in a row-wise manner, part of the AMX (Advanced Matrix Extensions) instruction set.
- TILEMOVCOL
- An x86 instruction that moves data between tiles in a column-wise manner, also part of the AMX instruction set.
- VEX
- Vector Extensions. A prefix byte used in newer x86 instruction sets (like AVX) to extend the instruction set and support wider vector registers.
- EVEX
- Enhanced Vector Extensions. A more advanced prefix used in AVX-512 and later instruction sets, offering greater flexibility and support for longer vectors.