s390: Add .insn pseudo-mnemonics vrr_a/b/c/d/e/f/g/h/i/j/k
Add support for s390 VRR instruction variants using .insn.
This patch adds support for eleven variants of the VRR instruction format (vrr_a through vrr_k) to the s390 gas assembler using the ‘.insn’ directive. These variants were introduced across different IBM processor generations (z13, z14, z15, z16, z17). The changes include updates to opcode definitions, documentation, and test suites.
In Details
This patch introduces support for eleven variations of the VRR instruction format (vrr_a through vrr_k) in the s390 GNU Assembler (gas) using the '.insn' pseudo-mnemonic. It defines these formats in opcodes/s390-opc.c and adds corresponding tests to gas/testsuite/gas/s390/zarch-operands.d/.s, referencing their introduction on various IBM z/Architecture processors and noting optional fields like M4 and I2 introduced in later models.
- .insn
- A GNU assembler directive that allows embedding raw instruction bytes or defining pseudo-mnemonics for specific instruction formats.
- pseudo-mnemonic
- An assembly language construct that represents a machine instruction, potentially with operands that are not direct encodings of machine code but are processed by the assembler.
- VRR
- A specific instruction format in the s390 architecture, with various sub-types introduced across different processor generations.
- z13, z14, z15, z16, z17
- IBM mainframe processor generations that introduced different versions or optional fields of the VRR instruction format.