s390: Add .insn pseudo-mnemonics vrs_a/b/c/d
Add support for s390 VRS instruction variants using .insn.
This patch adds support for four variants of the VRS instruction format (vrs_a, vrs_b, vrs_c, and vrs_d) to the s390 gas assembler using the ‘.insn’ pseudo-mnemonic. These variants were introduced in IBM processor generations z13 and z14. The changes include updates to opcode definitions, documentation, and test suites.
In Details
This patch introduces support for four variations of the VRS instruction format (vrs_a through vrs_d) in the s390 GNU Assembler (gas) using the '.insn' pseudo-mnemonic. It defines these formats, including operand orderings, in opcodes/s390-opc.c and adds corresponding tests to gas/testsuite/gas/s390/zarch-operands.d/.s, referencing their introduction on specific IBM z/Architecture processors.
- .insn
- A GNU assembler directive that allows embedding raw instruction bytes or defining pseudo-mnemonics for specific instruction formats.
- pseudo-mnemonic
- An assembly language construct that represents a machine instruction, potentially with operands that are not direct encodings of machine code but are processed by the assembler.
- VRS
- A specific instruction format in the s390 architecture, with variants introduced across different processor generations.
- z13, z14
- IBM mainframe processor generations that introduced different versions of the VRS instruction format.