RISC-V `match_*()` functions improve macro instruction handling and consistency.
Binutils RISC-V `match_*()` functions no longer unconditionally invoke `match_opcode()` for macro instructions, preventing false negatives and improving code c…
The RISC-V match_*() functions have been updated to conditionally invoke match_opcode() only when processing non-macro instructions. This change rectifies a potential source of false negatives that could arise from the evolving enumeration of macro instructions. Additionally, an assertion has been added to match_rs1_nonzero() to confirm its exclusive use with macro instructions, and a superfluous attribute was removed from match_rs1_nonzero_rs2_even() for improved code cleanliness.
In Details
In the RISC-V opcode matching logic, specifically within opcodes/riscv-opc.c, several match_*() functions like match_rd_even() and match_rs2_even() are used to determine if an instruction matches certain criteria. Previously, these functions would always call match_opcode(), which is a lower-level function for matching instruction opcodes. However, macro instructions, which are synthesized by the assembler and not directly represented by a single hardware opcode, have evolving enumerations. Unconditionally calling match_opcode() for these macro instructions could lead to incorrect…
For Context
When you write code for a RISC-V processor, an assembler like Binutils translates your human-readable instructions into machine code. Part of this process involves matching instructions against a set of known patterns. This is handled by functions like match_rd_even() and match_rs2_even() within the assembler's opcode processing. Some instructions are 'macro instructions,' which means they are not single, fundamental hardware operations but are expanded by the assembler into a sequence of simpler instructions. The way these macro instructions are represented internally can change as the assembler evolves. Previously, the matching logic would try to apply the same low-level opcode matching to all instructions, including these expandable macro instructions. This could lead to errors where valid macro instructions were not recognized. The change here makes the instruction matching smarter by only applying the strict opcode matching to non-macro instructions, ensuring that the assembl…