x86: Fold F16C templates with AVX512VL counterparts
Consolidates F16C instruction templates with AVX512VL, improving assembler logic and fixing related issues.
The assembler now folds F16C instruction templates with their AVX512VL counterparts, similar to FMA templates. This change simplifies the instruction handling logic and resolves an issue where enabling AVX512VL could incorrectly assemble 128- and 256-bit forms even when F16C was not supported.
In Details
This commit refactors the x86 gas backend's instruction template handling. It merges F16C (FP16 Convert) instruction templates with AVX512VL templates, recognizing that F16C is not a prerequisite for AVX512F. This aligns the handling with FMA templates and corrects a bug where AVX512VL could be enabled without sufficient underlying support for F16C, impacting 128/256-bit forms.
- F16C
- Instruction set extension for x86 that provides efficient conversion between 16-bit half-precision and 32-bit single-precision floating-point formats.
- AVX512VL
- AVX-512 Vector Length Extensions, which allow AVX-512 instructions to operate on 128-bit (XMM) and 256-bit (YMM) registers in addition to 512-bit (ZMM) registers.
- FMA
- Fused Multiply-Add instruction set extension for x86 processors, which combines a multiplication and an addition into a single operation.
- EVE X encoding
- A form of instruction encoding used by advanced AVX extensions, specifically AVX-512, for efficient and compact representation of instructions.