x86: Correct implied-AVX512VL checking in operand validation
Fixes AVX512VL operand size checks in the x86 assembler to correctly account for both explicit and implied AVX512VL support.
The x86 assembler’s operand validation logic now correctly checks for implied AVX512VL support when templates specify multiple advanced instruction set features. This prevents issues where operand size checks could be bypassed improperly, ensuring correct assembly for instructions that mix AVX2, AVX512F, and AVX512VL.
In Details
This commit corrects the check_VecOperands function in the x86 gas backend. Previously, templates combining AVX2|AVX512F (which implies AVX512VL) could bypass operand size checks. The fix ensures that both t->cpu and t->cpu_any are appropriately considered when determining if AVX512VL is supported, thus correctly applying operand size restrictions.
- AVX512VL
- AVX-512 Vector Length Extensions, which allow AVX-512 instructions to operate on 128-bit (XMM) and 256-bit (YMM) registers in addition to 512-bit (ZMM) registers.
- Template matching
- In the context of an assembler, template matching refers to the process of identifying which assembly instruction syntax corresponds to a specific machine code opcode based on predefined patterns and rules.
- GAS
- The GNU Assembler, part of the GNU Binutils package, responsible for converting assembly language code into machine code.