RISC-V: Add dedicated vector arithmetic .insn forms
Simplifies RISC-V vector instruction assembly by introducing specialized .insn forms.
This commit improves the RISC-V assembler by adding dedicated forms for vector arithmetic instructions using the .insn directive. These new forms simplify the process of encoding vector operations (OP_V and OP_VE) that might otherwise be challenging to express, making it easier for developers to utilize RISC-V vector capabilities.
In Details
The RISC-V assembler's tc-riscv.c and opcode definitions have been updated to introduce specialized .insn syntax for vector arithmetic operations. This patch adds support for FUNCT6 in addition to existing function fields and provides new named instruction forms in gas/testsuite/gas/riscv/insn-*.d and gas/testsuite/gas/riscv/insn.s. These additions aim to ease the encoding of vector instructions, particularly those involving OP_V and OP_VE, by offering more direct and readable .insn specifiers, addressing challenges mentioned in the .insn documentation.
- .insn
- An assembler directive used to specify raw machine instructions, often for unsupported or specialized instruction formats.
- RISC-V
- A free and open Instruction Set Architecture (ISA) based on modularity, extensibility, and simplicity.
- OP_V
- An opcode class in RISC-V for vector instructions.
- OP_VE
- An opcode class in RISC-V, likely related to extended vector operations or vector-edit instructions.
- FUNCT6
- A 6-bit field within a RISC-V instruction, used to specify function codes for certain operations.