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OCTOBER 6, 2026
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risc-v

RISC-V: Add support for XAndesVSIntH extension

Binutils now supports the RISC-V XAndesVSIntH extension for vector integer operations.

This commit adds support for the XAndesVSIntH extension to the RISC-V toolchain. The changes include updates to BFD for ELF compatibility, GAS for assembler directives and tests, and the opcode library for instruction recognition. This enables the use of new vector integer instructions for enhanced performance on compatible hardware.

In Details

This change adds support for the XAndesVSIntH extension to the RISC-V binutils. It involves updating BFD's riscv_multi_subset_supports functions to recognize the extension, modifying GAS to handle new assembly syntax and tests, and updating opcode tables and instruction classes in opcode/riscv-opc.c and include/opcode/riscv.h. This is part of ongoing efforts to expand RISC-V ISA support in toolchains.

For Context
XAndesVSIntH
A specific RISC-V extension from Andes Technology that adds support for vector integer operations.
RISC-V
An open-standard Instruction Set Architecture (ISA) based on Reduced Instruction Set Computer principles.
BFD
The Binary File Descriptor library, used by binutils to handle various object file formats like ELF.
GAS
The GNU Assembler, part of binutils, responsible for translating assembly language into machine code.
ELF
Executable and Linkable Format, a common standard file format for object files, executables, and shared libraries on Unix-like systems.
Filed Under: risc-vvector instructionsassembler